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an important notice at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. production data. iso7810 , iso7810f sllsep1b ? july 2015 ? revised june 2016 iso7810x high-performance, 8000-v pk reinforced single-channel digital isolator 1 1 features 1 ? signaling rate: up to 100 mbps ? wide supply range: 2.25 v to 5.5 v ? 2.25 v to 5.5 v level translation ? wide temperature range: ? 55 c to 125 c ? low power consumption, typical 1.8 ma at 1 mbps ? low propagation delay: 10.7 ns typical (5 v supplies) ? industry leading cmti (min): 100 kv/ s ? robust electromagnetic compatibility (emc) ? system-level esd, eft, and surge immunity ? low emissions ? isolation barrier life: > 40 years ? soic-16 wide body (dw) and extra-wide body (dww) package options ? safety-related certifications: ? 8000 v pk reinforced isolation per din v vde v 0884-10 (vde v 0884-10):2006-12 ? 5.7 kv rms isolation for 1 minute per ul 1577 ? csa component acceptance notice 5a, iec 60950-1 and iec 60601-1 end equipment standards ? cqc certification per gb4943.1-2011 ? tuv certification per en 61010-1 and en 60950-1 ? all dw package certifications complete; dww package certifications complete per ul, vde, and tuv and planned for csa and cqc 2 applications ? industrial automation ? motor control ? power supplies ? solar inverters ? medical equipment ? hybrid electric vehicles 3 description the iso7810x device is a high-performance, single- channel digital isolator with 8000 v pk isolation voltage. this device has reinforced isolation certifications according to vde, csa, cqc, and tuv. the isolator provides high electromagnetic immunity and low emissions at low power consumption, while isolating cmos or lvcmos digital i/os. the isolation channel has a logic input and output buffer separated by silicon dioxide (sio 2 ) insulation barrier. if the input power or signal is lost, the default output is high for the iso7810 and low for the iso7810f device. see the device functional modes section for further details. used in conjunction with isolated power supplies, this device helps prevent noise currents on a data bus or other circuits from entering the local ground and interfering with or damaging sensitive circuitry. through innovative chip design and layout techniques, electromagnetic compatibility of the iso7810x device has been significantly enhanced to ease system-level esd, eft, surge, and emissions compliance. the iso7810x device is available in 16- pin soic wide-body (dw) and extra-wide body (dww) packages.the dww package option comes with enable pin which can be used to put the output in high impedance state for multi-master driving applications and to reduce power consumption. device information (1) part number package body size (nom) iso7810 iso7810f dw (16) 10.30 mm 7.50 mm dww (16) 10.30 mm 14.0 mm (1) for all available packages, see the orderable addendum at the end of the datasheet. simplified schematic en2 (dww package only) out gnd2 gnd1 in v cc2 v cc1 isolation capacitor copyright ? 2016, texas instruments incorporated productfolder sample &buy technical documents tools & software support &community
2 iso7810 , iso7810f sllsep1b ? july 2015 ? revised june 2016 www.ti.com product folder links: iso7810 iso7810f submit documentation feedback copyright ? 2015 ? 2016, texas instruments incorporated table of contents 1 features .................................................................. 1 2 applications ........................................................... 1 3 description ............................................................. 1 4 revision history ..................................................... 2 5 pin configuration and functions ......................... 4 6 specifications ......................................................... 5 6.1 absolute maximum ratings ..................................... 5 6.2 esd ratings .............................................................. 5 6.3 recommended operating conditions ....................... 5 6.4 thermal information .................................................. 6 6.5 power rating ............................................................. 6 6.6 insulation characteristics ......................................... 7 6.7 regulatory information .............................................. 8 6.8 safety limiting values .............................................. 8 6.9 electrical characteristics ? 5-v supply ..................... 9 6.10 supply current characteristics ? 5-v supply .......... 9 6.11 electrical characteristics ? 3.3-v supply .............. 10 6.12 supply current characteristics ? 3.3-v supply ..... 10 6.13 electrical characteristics ? 2.5-v supply .............. 11 6.14 supply current characteristics ? 2.5-v supply ..... 11 6.15 switching characteristics ? 5-v supply ................. 12 6.16 switching characteristics ? 3.3-v supply .............. 12 6.17 switching characteristics ? 2.5-v supply .............. 13 6.18 insulation characteristics curves ......................... 14 6.19 typical characteristics .......................................... 15 7 parameter measurement information ................ 16 8 detailed description ............................................ 18 8.1 overview ................................................................. 18 8.2 functional block diagram ....................................... 18 8.3 feature description ................................................. 19 8.4 device functional modes ........................................ 20 9 applications and implementation ...................... 21 9.1 application information ............................................ 21 9.2 typical application .................................................. 21 10 power supply recommendations ..................... 23 11 layout ................................................................... 24 11.1 layout guidelines ................................................. 24 11.2 layout example .................................................... 24 12 device and documentation support ................. 25 12.1 documentation support ........................................ 25 12.2 related links ........................................................ 25 12.3 receiving notification of documentation updates 25 12.4 community resources .......................................... 25 12.5 trademarks ........................................................... 25 12.6 electrostatic discharge caution ............................ 25 12.7 glossary ................................................................ 25 13 mechanical, packaging, and orderable information ........................................................... 26 4 revision history note: page numbers for previous revisions may differ from page numbers in the current version. changes from revision a (september 2015) to revision b page ? changed features from: low power consumption, typical 1.8 ma per channel at 1 mbps to: low power consumption, typical 1.8 ma at 1 mbps ................................................................................................................................ 1 ? changed features from: low propagation delay: 11 ns typical to: low propagation delay: 10.7 ns typical ................. 1 ? changed features from: safety and regulatory approvals to: safety-related certifications ........................................... 1 ? added the extra-wide body package (16 pin soic [dww]) option ........................................................................................ 1 ? changed the ina, outa, v cci , and v cco pin names to in, out, v cc1 , and v cc2 (respectively) and updated the pin out drawings, pin functions table, and other figures to match ............................................................................................. 4 ? moved junction temperature from recommended operating conditions to absolute maximum ratings ......................... 5 ? changed the thermal information values for the dw package and add the values for the dww package ........................ 6 ? changed the values in the power rating table ..................................................................................................................... 6 ? moved insulation characteristics to the specifications section ............................................................................................. 7 ? changed c io specification from: 2 pf to: ~0.75 pf ............................................................................................................ 7 ? moved regulatory information to the specifications section ................................................................................................. 8 ? moved safety limiting values to the specifications section ................................................................................................. 8 ? changed the minimum cmti value from 50 to 100 and deleted the maximum value in the 5-v and 3.3-v electrical characteristics tables. also added v cm to the test conditions ................................................................................................ 9 ? changed the maximum value for the supply current, ac parameter at 100 mbps in all of the electrical characteristics tables ..................................................................................................................................................................................... 9 ? changed the minimum cmti value from 70 to 100 and deleted the maximum value in the 2.5-v electrical characteristics table. also added v cm to the test conditions ................................................................................................ 11 ? added the disable and enable propagation delay parameters to all of the switching characteristics tables ...................... 12
3 iso7810 , iso7810f www.ti.com sllsep1b ? july 2015 ? revised june 2016 product folder links: iso7810 iso7810f submit documentation feedback copyright ? 2015 ? 2016, texas instruments incorporated revision history (continued) ? changed t fs to: t do in switching characteristics ? 5-v supply ............................................................................................. 12 ? changed t fs to: t do in switching characteristics ? 3.3-v supply .......................................................................................... 12 ? changed t fs to: t do in switching characteristics ? 2.5-v supply .......................................................................................... 13 ? added the insulation characteristics curves section ........................................................................................................... 14 ? added the lifetime projection curves for the dw and dww packages in the insulation characteristics curves section .... 14 ? added figure 15 in the parameter measurement information section ................................................................................ 17 ? changed text " dual-channel digital isolator " to: " single-channel digital isolator " in application information ...................... 21 ? changed text " dc-dc converters " to: " transformer driver " in the typical application section ........................................... 21 ? changed figure 20 .............................................................................................................................................................. 21 changes from original (july 2015) to revision a page ? changed from: 1-page product preview to: production datasheet ..................................................................................... 1
4 iso7810 , iso7810f sllsep1b ? july 2015 ? revised june 2016 www.ti.com product folder links: iso7810 iso7810f submit documentation feedback copyright ? 2015 ? 2016, texas instruments incorporated 5 pin configuration and functions dw package 16-pin soic top view dww package 16-pin soic top view pin functions pin i/o description name no. dw dww en2 ? 13 i output enable 2. output pin on side 2 is enabled when en2 is high or open and in high-impedance state when en2 is low. gnd1 1, 7 2, 8 ? ground connection for v cc1 gnd2 9, 16 9, 15 ? ground connection for v cc2 in 4 5 i input channel nc 2, 5, 6, 8, 10, 11, 12, 15 3, 4, 6, 7, 10, 11, 14 ? not connected out 13 12 o output channel v cc1 3 1 ? power supply, side 1 v cc2 14 16 ? power supply, side 2 isolation gnd1 gnd2 9 8 nc nc 10 7 nc nc 11 6 in out 12 5 nc en2 13 4 nc nc 14 3 gnd1 gnd2 15 2 v cc1 v cc2 16 1 isolation nc gnd2 9 8 gnd1 nc 10 7 nc nc 11 6 nc nc 12 5 in out 13 4 v cc1 v cc2 14 3 nc nc 15 2 gnd1 gnd2 16 1
5 iso7810 , iso7810f www.ti.com sllsep1b ? july 2015 ? revised june 2016 product folder links: iso7810 iso7810f submit documentation feedback copyright ? 2015 ? 2016, texas instruments incorporated (1) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) all voltage values except differential i/o bus voltages are with respect to the local ground terminal (gnd1 or gnd2) and are peak voltage values. (3) maximum voltage must not exceed 6 v. 6 specifications 6.1 absolute maximum ratings see (1) min max unit supply voltage (2) v cc1 , v cc2 ? 0.5 6 v voltage in, out, en2 ? 0.5 v cc + 0.5 (3) v output current, i o ? 15 15 ma junction temperature, t j ? 55 150 c storage temperature, t stg ? 65 150 c (1) jedec document jep155 states that 500-v hbm allows safe manufacturing with a standard esd control process. (2) jedec document jep157 states that 250-v cdm allows safe manufacturing with a standard esd control process. 6.2 esd ratings value unit v esd electrostatic discharge human body model (hbm), per ansi/esda/jedec js-001, all pins (1) 6000 v charged device model (cdm), per jedec specification jesd22-c101, all pins (2) 1500 v 6.3 recommended operating conditions min nom max unit v cc1 , v cc2 supply voltage 2.25 5.5 v i oh high-level output current v cc2 = 5 v ? 4 ma v cc2 = 3.3 v ? 2 v cc2 = 2.5 v ? 1 i ol low-level output current v cc2 = 5 v 4 ma v cc2 = 3.3 v 2 v cc2 = 2.5 v 1 v ih high-level input voltage 0.7 v cc1 v cc1 v v il low-level input voltage 0 0.3 v cc1 v t ui input pulse duration 7 ns dr signaling rate 0 100 mbps t a ambient temperature ? 55 25 125 c
6 iso7810 , iso7810f sllsep1b ? july 2015 ? revised june 2016 www.ti.com product folder links: iso7810 iso7810f submit documentation feedback copyright ? 2015 ? 2016, texas instruments incorporated (1) for more information about traditional and new thermal metrics, see the semiconductor and ic package thermal metrics application report. 6.4 thermal information thermal metric (1) iso7810x unit dw (soic) dww (soic) 16 pins 16 pins r ja junction-to-ambient thermal resistance 89 92.2 c/w r jc(top) junction-to-case(top) thermal resistance 51.5 53.8 c/w r jb junction-to-board thermal resistance 53.6 62.9 c/w jt junction-to-top characterization parameter 22.5 23.9 c/w jb junction-to-board characterization parameter 23.1 62.2 c/w r jc(bottom) junction-to-case(bottom) thermal resistance ? ? c/w 6.5 power rating parameter test conditions min typ max unit p d maximum power dissipation v cc1 = v cc2 = 5.5 v, t j = 150 c, c l = 15 pf, input a 50 mhz 50% duty cycle square wave 50 mw p d1 maximum power dissipation by side-1 12.5 mw p d2 maximum power dissipation by side-2 37.5 mw
7 iso7810 , iso7810f www.ti.com sllsep1b ? july 2015 ? revised june 2016 product folder links: iso7810 iso7810f submit documentation feedback copyright ? 2015 ? 2016, texas instruments incorporated (1) creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed-circuit board do not reduce this distance. creepage and clearance on a printed-circuit board become equal in certain cases. techniques such as inserting grooves and/or ribs on a printed circuit board are used to help increase these specifications. (2) this coupler is suitable for safe electrical insulation only within the safety ratings. compliance with the safety ratings shall be ensured by means of suitable protective circuits. (3) testing is carried out in air or oil to determine the intrinsic surge immunity of the isolation barrier. (4) all pins on each side of the barrier tied together creating a two-terminal device. 6.6 insulation characteristics parameter test conditions specification unit dw dww clr external clearance (1) shortest terminal-to-terminal distance through air > 8 > 14.5 mm cpg external creepage (1) shortest terminal-to-terminal distance across the package surface > 8 > 14.5 mm dti distance through the insulation minimum internal gap (internal clearance) > 21 > 21 m cti comparative tracking index din en 60112 (vde 0303-11); iec 60112; ul 746a > 600 > 600 v material group i i overvoltage category per iec 60664-1 rated mains voltage 600 v rms i ? iv i ? iv rated mains voltage 1000 v rms i ? iii i ? iv din v vde v 0884-10 (vde v 0884-10):2006-12 (2) v iotm maximum transient isolation voltage v test = v iotm t = 60 s (qualification) t= 1 s (100% production) 8000 8000 v pk v iosm maximum surge isolation voltage (3) test method per iec 60065, 1.2/50 s waveform, v test = 1.6 v iosm = 12800 v pk (qualification) 8000 8000 v pk v iorm maximum repetitive peak isolation voltage 2121 2828 v pk v iowm maximum isolation working voltage time dependent dielectric breakdown (tddb) test; see figure 1 and figure 2 1500 2000 v rms 2121 2828 v dc v pr input-to-output test voltage method a, after input/output safety test subgroup 2/3, v pr = v iorm 1.2, t = 10 s, partial discharge < 5 pc 2545 3394 v pk method a, after environmental tests subgroup 1, v pr = v iorm 1.6, t = 10 s, partial discharge < 5 pc 3394 4525 method b1,after environmental tests subgroup 1, v pr = v iorm 1.875, t = 1 s (100% production test) partial discharge < 5 pc 3977 5303 c io barrier capacitance, input to output (4) v io = 0.4 sin (2 ft), f = 1 mhz ~0.75 ~0.75 pf r io isolation resistance, input to output (4) v io = 500 v, t a = 25 c > 10 12 > 10 12 ? v io = 500 v, 100 c t a max > 10 11 > 10 11 ? r s isolation resistance v io = 500 v at t s > 10 9 > 10 9 ? pollution degree 2 2 climatic category 55/125/21 55/125/21 ul 1577 v iso withstanding isolation voltage v test = v iso = 5700 v rms , t = 60 s (qualification); v test = 1.2 v iso = 6840 v rms , t = 1 s (100% production) 5700 5700 v rms
8 iso7810 , iso7810f sllsep1b ? july 2015 ? revised june 2016 www.ti.com product folder links: iso7810 iso7810f submit documentation feedback copyright ? 2015 ? 2016, texas instruments incorporated 6.7 regulatory information dw package certifications are complete. dww package certifications completed for ul, vde, and tuv and planned for csa and cqc. vde csa ul cqc tuv certified according to din v vde v 0884-10 (vde v 0884-10):2006-12 and din en 60950-1 (vde 0805 teil 1):2011-01 approved under csa component acceptance notice 5a, iec 60950-1 and iec 60601-1 recognized under ul 1577 component recognition program certified according to gb 4943.1-2011 certified according to en 61010- 1:2010 (3rd ed) and en 60950- 1:2006/a11:2009/a1:2010/a12:2011 /a2:2013 reinforced insulation maximum transient isolation voltage, 8000 v pk ; maximum repetitive peak isolation voltage, 2121 v pk (dw package), 2828 v pk (dww package); maximum surge isolation voltage, 8000 v pk reinforced insulation per csa 60950-1-07+a1+a2 and iec 60950-1 2nd ed., 800 v rms max working voltage (pollution degree 2, material group i); single protection, 5700 v rms reinforced insulation, altitude 5000 m, tropical climate, 250 v rms maximum working voltage 5700 v rms reinforced insulation per en 61010-1:2010 (3rd ed) up to working voltage of 600 v rms (dw package) and 1000 v rms (dww package) 2 mopp (means of patient protection) per csa 60601- 1:14 and iec 60601-1 ed. 3.1, 250 v rms (354 v pk ) max working voltage 5700 v rms reinforced insulation per en 60950- 1:2006/a11:2009/a1:2010/a12:2011 /a2:2013 up to working voltage of 800 v rms (dw package) and 1450 v rms (dww package) certificate number: 40040142 master contract number: 220991 file number: e181974 certificate number: cqc15001121716 client id number: 77311 6.8 safety limiting values safety limiting intends to minimize potential damage to the isolation barrier upon failure of input or output circuitry. a failure of the i/o can allow low resistance to ground or the supply and, without current limiting, dissipate sufficient power to overheat the die and damage the isolation barrier potentially leading to secondary system failures. parameter test conditions min typ max unit dw package i s safety input, output, or supply current r ja = 89 c/w, v i = 5.5 v, t j = 150 c, t a = 25 c, see figure 3 255 ma r ja = 89 c/w, v i = 3.6 v, t j = 150 c, t a = 25 c, see figure 3 390 r ja = 89 c/w, v i = 2.75 v, t j = 150 c, t a = 25 c, see figure 3 511 p s safety input, output, or total power r ja = 89 c/w, t j = 150 c, t a = 25 c, see figure 5 1404 mw t s maximum safety temperature 150 c dww package i s safety input, output, or supply current r ja = 92.2 c/w, v i = 5.5 v, t j = 150 c, t a = 25 c, see figure 4 246 ma r ja = 92.2 c/w, v i = 3.6 v, t j = 150 c, t a = 25 c, see figure 4 377 r ja = 92.2 c/w, v i = 2.75 v, t j = 150 c, t a = 25 c, see figure 4 493 p s safety input, output, or total power r ja = 92.2 c/w, t j = 150 c, t a = 25 c, see figure 6 1356 mw t s maximum safety temperature 150 c the maximum safety temperature is the maximum junction temperature specified for the device. the power dissipation and junction-to-air thermal impedance of the device installed in the application hardware determines the junction temperature. the assumed junction-to-air thermal resistance in the thermal information is that of a device installed on a high-k test board for leaded surface mount packages. the power is the recommended maximum input voltage times the current. the junction temperature is then the ambient temperature plus the power times the junction-to-air thermal resistance.
9 iso7810 , iso7810f www.ti.com sllsep1b ? july 2015 ? revised june 2016 product folder links: iso7810 iso7810f submit documentation feedback copyright ? 2015 ? 2016, texas instruments incorporated (1) measured from input pin to ground. 6.9 electrical characteristics ? 5-v supply v cc1 = v cc2 = 5 v 10% (over recommended operating conditions unless otherwise noted) parameter test conditions min typ max unit v oh high-level output voltage i oh = ? 4 ma; see figure 13 v cc2 ? 0.4 v cc2 ? 0.2 v v ol low-level output voltage i ol = 4 ma; see figure 13 0.2 0.4 v v i(hys) input threshold voltage hysteresis 0.1 v cc1 v i ih high-level input current v ih = v cc1 at in or en2 10 a i il low-level input current v il = 0 v at in or en2 ? 10 a cmti common-mode transient immunity v i = v cc1 or 0 v, v cm = 1500 v; see figure 16 100 kv/ s c i input capacitance (1) v i = v cc /2 + 0.4 sin (2 ft), f = 1 mhz, v cc = 5 v 2 pf 6.10 supply current characteristics ? 5-v supply v cc1 = v cc2 = 5 v 10% (over recommended operating conditions unless otherwise noted) parameter test conditions supply current min typ max unit supply current - disable (dww package only) en2 = 0 v, v i = 0 v (devices with suffix f), v i = v cc1 (devices without suffix f) i cc1 0.6 1.1 ma i cc2 0.16 0.3 en2 = 0 v, v i = v cc1 (devices with suffix f), v i = 0 v (devices without suffix f) i cc1 1.8 2.7 i cc2 0.16 0.3 supply current - dc signal v i = 0 v (devices with suffix f), v i = v cc1 (devices without suffix f) i cc1 0.6 1.1 ma i cc2 0.6 1.1 v i = v cc1 (devices with suffix f), v i = 0 v (devices without suffix f) i cc1 1.8 2.7 i cc2 0.7 1.1 supply current - ac signal input signal switching with square wave clock input; c l = 15 pf 1 mbps i cc1 1.2 1.9 ma i cc2 0.6 1.1 10 mbps i cc1 1.2 1.9 i cc2 1.1 1.6 100 mbps i cc1 1.3 2 i cc2 5.7 7.3
10 iso7810 , iso7810f sllsep1b ? july 2015 ? revised june 2016 www.ti.com product folder links: iso7810 iso7810f submit documentation feedback copyright ? 2015 ? 2016, texas instruments incorporated 6.11 electrical characteristics ? 3.3-v supply v cc1 = v cc2 = 3.3 v 10% (over recommended operating conditions unless otherwise noted) parameter test conditions min typ max unit v oh high-level output voltage i oh = ? 2 ma; see figure 13 v cc2 ? 0.4 v cc2 ? 0.2 v v ol low-level output voltage i ol = 2 ma; see figure 13 0.2 0.4 v v i(hys) input threshold voltage hysteresis 0.1 v cc1 v i ih high-level input current v ih = v cc1 at in or en2 10 a i il low-level input current v il = 0 v at in or en2 ? 10 a cmti common-mode transient immunity v i = v cc1 or 0 v, v cm = 1500 v; see figure 16 100 kv/ s 6.12 supply current characteristics ? 3.3-v supply v cc1 = v cc2 = 3.3 v 10% (over recommended operating conditions unless otherwise noted) parameter test conditions supply current min typ max unit supply current - disable (dww package only) en2 = 0 v, v i = 0 v (devices with suffix f), v i = v cc1 (devices without suffix f) i cc1 0.6 1.1 ma i cc2 0.16 0.3 en2 = 0 v, v i = v cc1 (devices with suffix f), v i = 0 v (devices without suffix f) i cc1 1.8 2.7 i cc2 0.16 0.3 supply current - dc signal v i = 0 v (devices with suffix f), v i = v cc1 (devices without suffix f) i cc1 0.6 1.1 ma i cc2 0.6 1 v i = v cc1 (devices with suffix f), v i = 0 v(devices without suffix f) i cc1 1.8 2.7 i cc2 0.6 1.1 supply current - ac signal input signal switching with square wave clock input; c l = 15 pf 1 mbps i cc1 1.2 1.9 ma i cc2 0.6 1.1 10 mbps i cc1 1.2 1.9 i cc2 0.9 1.4 100 mbps i cc1 1.3 2 i cc2 4.1 5.4
11 iso7810 , iso7810f www.ti.com sllsep1b ? july 2015 ? revised june 2016 product folder links: iso7810 iso7810f submit documentation feedback copyright ? 2015 ? 2016, texas instruments incorporated 6.13 electrical characteristics ? 2.5-v supply v cc1 = v cc2 = 2.5 v 10% (over recommended operating conditions unless otherwise noted) parameter test conditions min typ max unit v oh high-level output voltage i oh = ? 1 ma; see figure 13 v cc2 ? 0.4 v cc2 ? 0.2 v v ol low-level output voltage i ol = 1 ma; see figure 13 0.2 0.4 v v i(hys) input threshold voltage hysteresis 0.1 x v cc1 v i ih high-level input current v ih = v cc1 at in or en2 10 a i il low-level input current v il = 0 v at in or en2 ? 10 a cmti common-mode transient immunity v i = v cc1 or 0 v, v cm = 1500 v; see figure 16 100 kv/ s 6.14 supply current characteristics ? 2.5-v supply v cc1 = v cc2 = 2.5 v 10% (over recommended operating conditions unless otherwise noted) parameter test conditions supply current min typ max unit supply current, - disable (dww package only) en2 = 0 v, v i = 0 v (devices with suffix f), v i = v cc1 (devices without suffix f) i cc1 0.6 1.1 ma i cc2 0.16 0.3 en2 = 0 v, v i = v cc1 (devices with suffix f), v i = 0 v (devices without suffix f) i cc1 1.8 2.7 i cc2 0.16 0.3 supply current - dc signal v i = 0 v (devices with suffix f), v i = v ccx (devices without suffix f) i cc1 0.6 1.1 ma i cc2 0.6 1 v i = v ccx (devices with suffix f), v i = 0 v(devices without suffix f) i cc1 1.8 2.7 i cc2 0.6 1.1 supply current - ac signal input signal switching with square wave clock input; c l = 15 pf 1 mbps i cc1 1.2 1.9 ma i cc2 0.6 1.1 10 mbps i cc1 1.2 1.9 i cc2 0.9 1.3 100 mbps i cc1 1.3 2 i cc2 3.3 4.4
12 iso7810 , iso7810f sllsep1b ? july 2015 ? revised june 2016 www.ti.com product folder links: iso7810 iso7810f submit documentation feedback copyright ? 2015 ? 2016, texas instruments incorporated (1) also known as pulse skew. (2) t sk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same direction while operating at identical supply voltages, temperature, input signals and loads. 6.15 switching characteristics ? 5-v supply v cc1 = v cc2 = 5 v 10% (over recommended operating conditions unless otherwise noted) parameter test conditions min typ max unit t plh , t phl propagation delay time see figure 13 6 10.7 16 ns pwd pulse width distortion (1) |t phl ? t plh | 0.6 4.6 ns t sk(pp) part-to-part skew time (2) 4.5 ns t r output signal rise time see figure 13 2.4 3.9 ns t f output signal fall time 2.4 3.9 ns t phz disable propagation delay, high-to-high impedance output for iso7810dww and ISO7810FDWw see figure 14 12 20 ns t plz disable propagation delay, low-to-high impedance output for iso7810dww and ISO7810FDWw 12 20 ns t pzh enable propagation delay, high impedance-to-high output iso7810dww 10 20 ns ISO7810FDWw 2 2.5 s t pzl enable propagation delay, high impedance-to-low output iso7810dww 2 2.5 s ISO7810FDWw 10 20 ns t do default output delay time from input power loss measured from the time v cc goes below 1.7 v. see figure 15 0.2 9 s t ie time interval error 2 16 ? 1 prbs data at 100 mbps 1 ns (1) also known as pulse skew. (2) t sk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same direction while operating at identical supply voltages, temperature, input signals and loads. 6.16 switching characteristics ? 3.3-v supply v cc1 = v cc2 = 3.3 v 10% (over recommended operating conditions unless otherwise noted) parameter test conditions min typ max unit t plh , t phl propagation delay time see figure 13 6 10.8 16 ns pwd pulse width distortion (1) |t phl ? t plh | 0.7 4.7 ns t sk(pp) part-to-part skew time (2) 4.5 ns t r output signal rise time see figure 13 1.3 3 ns t f output signal fall time 1.3 3 ns t phz disable propagation delay, high-to-high impedance output for iso7810dww and ISO7810FDWw see figure 14 17 32 ns t plz disable propagation delay, low-to-high impedance output for iso7810dww and ISO7810FDWw 17 32 ns t pzh enable propagation delay, high impedance-to-high output iso7810dww 17 32 ns ISO7810FDWw 2 2.5 s t pzl enable propagation delay, high impedance-to-low output iso7810dww 2 2.5 s ISO7810FDWw 17 32 ns t do default output delay time from input power loss measured from the time v cc goes below 1.7 v. see figure 15 0.2 9 s t ie time interval error 2 16 ? 1 prbs data at 100 mbps 1 ns
13 iso7810 , iso7810f www.ti.com sllsep1b ? july 2015 ? revised june 2016 product folder links: iso7810 iso7810f submit documentation feedback copyright ? 2015 ? 2016, texas instruments incorporated (1) also known as pulse skew. (2) t sk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same direction while operating at identical supply voltages, temperature, input signals and loads. 6.17 switching characteristics ? 2.5-v supply v cc1 = v cc2 = 2.5 v 10% (over recommended operating conditions unless otherwise noted) parameter test conditions min typ max unit t plh , t phl propagation delay time see figure 13 7.5 11.7 17.5 ns pwd pulse width distortion (1) |t phl ? t plh | 0.7 4.7 ns t sk(pp) part-to-part skew time (2) 4.5 ns t r output signal rise time see figure 13 1.8 3.5 ns t f output signal fall time 1.8 3.5 ns t phz disable propagation delay, high-to-high impedance output for iso7810dww and ISO7810FDWw see figure 14 22 45 ns t plz disable propagation delay, low-to-high impedance output for iso7810dww and ISO7810FDWw 22 45 ns t pzh enable propagation delay, high impedance-to-high output iso7810dww 18 45 ns ISO7810FDWw 2 2.5 s t pzl enable propagation delay, high impedance-to-low output iso7810dww 2 2.5 s ISO7810FDWw 18 45 ns t do default output delay time from input power loss measured from the time v cc goes below 1.7 v. see figure 15 0.2 9 s t ie time interval error 2 16 ? 1 prbs data at 100 mbps 1 ns
14 iso7810 , iso7810f sllsep1b ? july 2015 ? revised june 2016 www.ti.com product folder links: iso7810 iso7810f submit documentation feedback copyright ? 2015 ? 2016, texas instruments incorporated 6.18 insulation characteristics curves t a upto 150 c operating lifetime = 135 years stress-voltage frequency = 60 hz isolation working voltage = 1500 v rms figure 1. reinforced isolation capacitor lifetime projection for devices in dw package t a upto 150 c operating lifetime = 34 years stress-voltage frequency = 60 hz isolation working voltage = 2000 v rms figure 2. reinforced isolation capacitor lifetime projection for devices in dww package figure 3. thermal derating curves for safety limiting current for dw package figure 4. thermal derating curves for safety limiting current for dww package figure 5. thermal derating curve for safety limiting power for dw package figure 6. thermal derating curve for safety limiting power for dww package ambient temperature ( q c) safety limiting current (ma) 0 50 100 150 200 0 100 200 300 400 500 600 d003 v cc1 = v cc2 = 2.75 v v cc1 = v cc2 = 3.6 v v cc1 = v cc2 = 5.5 v ambient temperature ( q c) safety limiting current (ma) 0 50 100 150 200 0 100 200 300 400 500 600 d004 v cc1 = v cc2 = 2.75 v v cc1 = v cc2 = 3.6 v v cc1 = v cc2 = 5.5 v stress voltage (v rms ) time to fail (s) 500 1500 2500 3500 4500 5500 6500 7500 8500 9500 1.e+1 1.e+2 1.e+3 1.e+4 1.e+5 1.e+6 1.e+7 1.e+8 1.e+9 1.e+10 1.e+11 safety margin zone: 1800 v rms , 254 years operating zone: 1500 v rms , 135 years 20% 87.5% tddb line (<1 ppm fail rate) stress voltage (v rms ) time to fail (s) 400 1400 2400 3400 4400 5400 6400 7400 8400 9400 1.e+1 1.e+2 1.e+3 1.e+4 1.e+5 1.e+6 1.e+7 1.e+8 1.e+9 1.e+10 1.e+11 safety margin zone: 2400 v rms , 63 years operating zone: 2000 v rms , 34 years 20% 87.5% tddb line (<1 ppm fail rate) ambient temperature ( q c) safety limiting power (mw) 0 50 100 150 200 0 200 400 600 800 1000 1200 1400 1600 d005 power ambient temperature ( q c) safety limiting power (mw) 0 50 100 150 200 0 200 400 600 800 1000 1200 1400 1600 d006 power
15 iso7810 , iso7810f www.ti.com sllsep1b ? july 2015 ? revised june 2016 product folder links: iso7810 iso7810f submit documentation feedback copyright ? 2015 ? 2016, texas instruments incorporated 6.19 typical characteristics t a = 25 c c l = 15 pf figure 7. supply current vs data rate (with 15-pf load) t a = 25 c c l = no load figure 8. supply current vs data rate (with no load) t a = 25 c figure 9. high-level output voltage vs high-level output current t a = 25 c figure 10. low-level output voltage vs low-level output current figure 11. power supply undervoltage threshold vs free- air temperature figure 12. propagation delay time vs free-air temperature free-air temperature ( o c ) power supply under voltage threshold (v) -50 0 50 100 150 1.70 1.75 1.80 1.85 1.90 1.95 2.00 2.05 2.10 2.15 2.20 2.25 d001 v cc1 rising v cc1 falling v cc2 rising v cc2 falling free-air temperature ( o c ) propagation delay time (ns) -60 -30 0 30 60 90 120 5 6 7 8 9 10 11 12 13 14 15 d006 t plh at 2.5 v t phl at 2.5 v t phl at 3.3 v t plh at 3.3 v t plh at 5 v t phl at 5 v high-level output current (ma) high-level output voltage (v) -15 -10 -5 0 0 1 2 3 4 5 6 d001 v cc at 2.5v v cc at 3.3v v cc at 5.0v low-level output current (ma) low-level output voltage (v) 0 5 10 15 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 d001 v cc at 2.5v v cc at 3.3v v cc at 5.0v data rate (mbps) supply current (ma) 0 25 50 75 100 125 150 0 4 8 12 d001 i cc1 at 2.5 v i cc2 at 2.5 v i cc1 at 3.3 v i cc2 at 3.3 v i cc1 at 5 v i cc2 at 5 v data rate (mbps) supply current (ma) 0 25 50 75 100 125 150 0 2 4 6 8 d002 i cc1 at 2.5 v i cc2 at 2.5 v i cc1 at 3.3 v i cc2 at 3.3 v i cc1 at 5 v i cc2 at 5 v
16 iso7810 , iso7810f sllsep1b ? july 2015 ? revised june 2016 www.ti.com product folder links: iso7810 iso7810f submit documentation feedback copyright ? 2015 ? 2016, texas instruments incorporated 7 parameter measurement information a. the input pulse is supplied by a generator having the following characteristics: prr 50 khz, 50% duty cycle, t r 3 ns, t f 3ns, z o = 50 . at the input, 50 resistor is required to terminate input generator signal. it is not needed in actual application. b. c l = 15 pf and includes instrumentation and fixture capacitance within 20%. figure 13. switching characteristics test circuit and voltage waveforms a. the input pulse is supplied by a generator having the following characteristics: prr 10 khz, 50% duty cycle, t r 3 ns, t f 3 ns, z o = 50 . b. c l = 15 pf and includes instrumentation and fixture capacitance within 20%. figure 14. enable and disable propagation delay time test circuit and waveform in out c l see note b v o v i v ol v oh v cc1 0 v t r isolation barrier 50 input generator (see note a) v i v o t f t plh t phl 50% 50% 50% 50% 90% 10% input generator (see note a) input generator (see note a) in out isolation barrier in out isolation barrier v o v o c l see note b c l see note b 50 50 0 v 3 v en en v cc2 r l = 1 k 1% r l = 1 k 1% v i v i v o v i t pzl v cc / 2 50% v cc v cc / 2 v oh 0 v v ol t plz 0.5 v v o v i t pzh v cc / 2 50% v cc v cc / 2 v oh 0 v 0 v t phz 0.5 v
17 iso7810 , iso7810f www.ti.com sllsep1b ? july 2015 ? revised june 2016 product folder links: iso7810 iso7810f submit documentation feedback copyright ? 2015 ? 2016, texas instruments incorporated parameter measurement information (continued) a. c l = 15 pf and includes instrumentation and fixture capacitance within 20%. figure 15. default output delay time test circuit and voltage waveforms a. c l = 15 pf and includes instrumentation and fixture capacitance within 20%. figure 16. common-mode transient immunity test circuit in out isolation barrier en v cc2 c l see note a s1 gnd2 gnd1 + v cm + v oh or v ol c = 0.1 f 1% c = 0.1 f 1% v cc1 pass-fail criteria: the output must remain stable. v o out in in = 0 v (devices without suffix f) in = v (devices with suffix f) cc see note a c l v i 0 v t do default high v o v i 1.7 v 50% v cc v cc v ol v oh isolation barrier default low copyright ? 2016, texas instruments incorporated
18 iso7810 , iso7810f sllsep1b ? july 2015 ? revised june 2016 www.ti.com product folder links: iso7810 iso7810f submit documentation feedback copyright ? 2015 ? 2016, texas instruments incorporated 8 detailed description 8.1 overview the iso7810x device has an on-off keying (ook) modulation scheme to transmit the digital data across a silicon dioxide based isolation barrier. the transmitter sends a high frequency carrier across the barrier to represent one digital state and sends no signal to represent the other digital state. the receiver demodulates the signal after advanced signal conditioning and produces the output through a buffer stage. these devices also incorporates advanced circuit techniques to maximize the cmti performance and minimize the radiated emissions due the high frequency carrier and io buffer switching. the conceptual block diagram of a digital capacitive isolator, figure 17 , shows a functional block diagram of a typical channel. 8.2 functional block diagram figure 17. conceptual block diagram of a digital capacitive isolator figure 18 shows how the on/off keying scheme works. figure 18. on-off keying (ook) based modulation scheme tx in rx out carrier signal through isolation barrier tx in oscillator ook modulation transmitter emissions reduction techniques tx signal conditioning envelope detection rx signal conditioning receiver en rx out sio 2 based capacitive isolation barrier copyright ? 2016, texas instruments incorporated
19 iso7810 , iso7810f www.ti.com sllsep1b ? july 2015 ? revised june 2016 product folder links: iso7810 iso7810f submit documentation feedback copyright ? 2015 ? 2016, texas instruments incorporated (1) see the regulatory information section for detailed isolation ratings. 8.3 feature description the iso7810 is available in both default output state options to enable a variety of application uses. table 1 provides an overview of the device features. table 1. device features part number rated isolation maximum data rate default output iso7810 5700 v rms / 8000 v pk (1) 100 mbps high iso7810f 5700 v rms / 8000 v pk (1) 100 mbps low 8.3.1 electromagnetic compatibility (emc) considerations many applications in harsh industrial environment are sensitive to disturbances such as electrostatic discharge (esd), electrical fast transient (eft), surge and electromagnetic emissions. these electromagnetic disturbances are regulated by international standards such as iec 61000-4-x and cispr 22. although system-level performance and reliability depends, to a large extent, on the application board design and layout, the iso7810x device incorporates many chip-level design improvements for overall system robustness. some of these improvements include: ? robust esd protection cells for input and output signal pins and inter-chip bond pads. ? low-resistance connectivity of esd cells to supply and ground pins. ? enhanced performance of high voltage isolation capacitor for better tolerance of esd, eft and surge events. ? bigger on-chip decoupling capacitors to bypass undesirable high energy signals through a low impedance path. ? pmos and nmos devices isolated from each other by using guard rings to avoid triggering of parasitic scrs. ? reduced common mode currents across the isolation barrier by ensuring purely differential internal operation.
20 iso7810 , iso7810f sllsep1b ? july 2015 ? revised june 2016 www.ti.com product folder links: iso7810 iso7810f submit documentation feedback copyright ? 2015 ? 2016, texas instruments incorporated (1) pu = powered up (v cc 2.25 v); pd = powered down (v cc 1.7 v); x = irrelevant; h = high level; l = low level (2) a strongly driven input signal can weakly power the floating v cc via an internal protection diode and cause undetermined output. (3) the outputs are in undetermined state when 1.7 v < v cc1 , v cc2 < 2.25 v. 8.4 device functional modes table 2 lists the iso7810x functional modes. table 2. function table (1) v cc1 v cc2 input (in) (2) output (out) comments pu pu h h normal operation: a channel output assumes the logic state of the input. l l open default default mode: when in is open, the corresponding channel output goes to the default logic state. default = high for iso7810 and low for iso7810f. pd pu x default default mode: when v cc1 is unpowered, a channel output assumes the logic state based on the selected default option. default = high for iso7810 and low for iso7810f. when v cc1 transitions from unpowered to powered-up, a channel output assumes the logic state of the input. when v cc1 transitions from powered-up to unpowered, channel output assumes the selected default state. x pd x undetermined when v cc2 is unpowered, a channel output is undetermined (3) . when v cc2 transitions from unpowered to powered-up, a channel output assumes the logic state of its input 8.4.1 device i/o schematics figure 19. device i/o schematics output 985 1.5 m in v cc1 v cc1 v cc1 input (devices without f suffix) 985 1.5 m in v cc1 v cc1 v cc1 v cc1 input (devices with f suffix) v cc2 ~20 out enable 1970 2 m en2 v cc2 v cc2 v cc2 v cc2
21 iso7810 , iso7810f www.ti.com sllsep1b ? july 2015 ? revised june 2016 product folder links: iso7810 iso7810f submit documentation feedback copyright ? 2015 ? 2016, texas instruments incorporated 9 applications and implementation note information in the following applications sections is not part of the ti component specification, and ti does not warrant its accuracy or completeness. ti ? s customers are responsible for determining suitability of components for their purposes. customers should validate and test their design implementation to confirm system functionality. 9.1 application information the iso7810x device is a high-performance, single-channel digital isolator with a 5.7-kv rms isolation voltage. the device uses single-ended cmos-logic switching technology. the supply voltage range is from 2.25 v to 5.5 v for both supplies, v cc1 and v cc2 . when designing with digital isolators, keep in mind that because of the single-ended design structure, digital isolators do not conform to any specific interface standard and are only intended for isolating single-ended cmos or ttl digital signal lines. the isolator is typically placed between the data controller (that is, c or uart), and a data converter or a line transceiver, regardless of the interface type or standard. 9.2 typical application the iso7810f device can be used with texas instruments' gate driver and transformer driver to create an isolated mosfet/igbt drive circuit. figure 20. low-side isolated gate driver circuit 1 f v in 10 f mbr0520l mbr0520l 1:2.2 0.1 f 31 d2 sn6501 d1 5 2 gnd gnd 4 3.3 v vdd vref gnd outh outl 54 1,7 in- in+ 4 3 0.22 f ucc27611 iso barrier 10 1 vcc 0.1 f 4 v cc1 v cc2 gnd1 gnd2 in out iso7810f 9,16 13 0.1 f 14 3 1 2 7 0.1 f 6 0.22 f 0.1 f 6 p3.0 xout xin 5 msp430f2132 dv ss dv cc 11 2 vsource l1 q1 vout c1 d1 10 f copyright ? 2016, texas instruments incorporated
22 iso7810 , iso7810f sllsep1b ? july 2015 ? revised june 2016 www.ti.com product folder links: iso7810 iso7810f submit documentation feedback copyright ? 2015 ? 2016, texas instruments incorporated typical application (continued) 9.2.1 design requirements for this design example, use the parameters listed in table 3 . table 3. design parameters parameter value supply voltage 2.25 v to 5.5 v decoupling capacitor between v cc1 and gnd1 0.1 f decoupling capacitor from v cc2 and gnd2 0.1 f 9.2.2 detailed design procedure unlike optocouplers, which require external components to improve performance, provide bias, or limit current, the iso7810x device only requires two external bypass capacitors to operate. figure 21. typical iso7810dw circuit hook-up 9.2.3 application curve the following typical eye diagram of the iso7810x device indicates low jitter and wide open eye at the maximum data rate of 100 mbps. figure 22. eye diagram at 100 mbps prbs, 5 v, and 25 c gnd1 gnd2 out in gnd1 gnd2 gnd2 v cc2 v cc1 gnd1 isolation nc gnd2 9 8 gnd1 nc 10 7 nc nc 11 6 nc nc 12 5 in out 13 4 v cc1 v cc2 14 3 nc nc 15 2 gnd1 gnd2 16 1 0.1 f 0.1 f
23 iso7810 , iso7810f www.ti.com sllsep1b ? july 2015 ? revised june 2016 product folder links: iso7810 iso7810f submit documentation feedback copyright ? 2015 ? 2016, texas instruments incorporated 10 power supply recommendations to help ensure reliable operation at data rates and supply voltages, a 0.1- f bypass capacitor is recommended at input and output supply pins (v cc1 and v cc2 ). the capacitors should be placed as close to the supply pins as possible. if only a single primary-side power supply is available in an application, isolated power can be generated for the secondary-side with the help of a transformer driver such as texas instruments' sn6501 . for such applications, detailed power supply design and transformer selection recommendations are available in sn6501 data sheet ( sllsea0 ) .
24 iso7810 , iso7810f sllsep1b ? july 2015 ? revised june 2016 www.ti.com product folder links: iso7810 iso7810f submit documentation feedback copyright ? 2015 ? 2016, texas instruments incorporated 11 layout 11.1 layout guidelines a minimum of four layers is required to accomplish a low emi pcb design (see figure 23 ). layer stacking should be in the following order (top-to-bottom): high-speed signal layer, ground plane, power plane and low-frequency signal layer. ? routing the high-speed traces on the top layer avoids the use of vias (and the introduction of their inductances) and allows for clean interconnects between the isolator and the transmitter and receiver circuits of the data link. ? placing a solid ground plane next to the high-speed signal layer establishes controlled impedance for transmission line interconnects and provides an excellent low-inductance path for the return current flow. ? placing the power plane next to the ground plane creates additional high-frequency bypass capacitance of approximately 100 pf/in 2 . ? routing the slower speed control signals on the bottom layer allows for greater flexibility as these signal links usually have margin to tolerate discontinuities such as vias. if an additional supply voltage plane or signal layer is needed, add a second power or ground plane system to the stack to keep it symmetrical. this makes the stack mechanically stable and prevents it from warping. also the power and ground plane of each power system can be placed closer together, thus increasing the high-frequency bypass capacitance significantly. for detailed layout recommendations, see the application note, digital isolator design guide ( slla284 ). 11.1.1 pcb material for digital circuit boards operating at less than 150 mbps, (or rise and fall times greater than 1 ns), and trace lengths of up to 10 inches, use standard fr-4 ul94v-0 printed circuit board. this pcb is preferred over cheaper alternatives because of lower dielectric losses at high frequencies, less moisture absorption, greater strength and stiffness, and the self-extinguishing flammability-characteristics. 11.2 layout example figure 23. layout example 10 mils 10 mils 40 mils fr-4 0 r ~ 4.5 keep this space free from planes, traces, pads, and vias ground plane power plane low-speed traces high-speed traces
25 iso7810 , iso7810f www.ti.com sllsep1b ? july 2015 ? revised june 2016 product folder links: iso7810 iso7810f submit documentation feedback copyright ? 2015 ? 2016, texas instruments incorporated 12 device and documentation support 12.1 documentation support 12.1.1 related documentation for related documentation, see the following: ? isolation glossary , slla353 ? iso784xx quad-channel digital isolator evm user guide , slau602 ? shelf-life evaluation of lead-free component finishes , szza046 ? sn6501 transformer driver for isolated power supplies , sllsea0 ? ucc2753x 2.5-a and 5-a, 35-v max vdd fet and igbt single-gate driver , slusba7 ? msp430f2132 mixed signal microcontroller , slas578 12.2 related links the table below lists quick access links. categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. table 4. related links parts product folder sample & buy technical documents tools & software support & community iso7810 click here click here click here click here click here iso7810f click here click here click here click here click here 12.3 receiving notification of documentation updates to receive notification of documentation updates ? go to the product folder for your device on ti.com. in the upper right-hand corner, click the alert me button to register and receive a weekly digest of product information that has changed (if any). for change details, check the revision history of any revised document. 12.4 community resources the following links connect to ti community resources. linked contents are provided "as is" by the respective contributors. they do not constitute ti specifications and do not necessarily reflect ti's views; see ti's terms of use . ti e2e ? online community ti's engineer-to-engineer (e2e) community. created to foster collaboration among engineers. at e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. design support ti's design support quickly find helpful e2e forums along with design support tools and contact information for technical support. 12.5 trademarks e2e is a trademark of texas instruments. all other trademarks are the property of their respective owners. 12.6 electrostatic discharge caution these devices have limited built-in esd protection. the leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the mos gates. 12.7 glossary slyz022 ? ti glossary . this glossary lists and explains terms, acronyms, and definitions.
26 iso7810 , iso7810f sllsep1b ? july 2015 ? revised june 2016 www.ti.com product folder links: iso7810 iso7810f submit documentation feedback copyright ? 2015 ? 2016, texas instruments incorporated 13 mechanical, packaging, and orderable information the following pages include mechanical, packaging, and orderable information. this information is the most current data available for the designated devices. this data is subject to change without notice and revision of this document. for browser-based versions of this data sheet, refer to the left-hand navigation.
package option addendum www.ti.com 2-sep-2016 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples iso7810dw active soic dw 16 40 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -55 to 125 iso7810 iso7810dwr active soic dw 16 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -55 to 125 iso7810 iso7810dww active soic dww 16 45 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -55 to 125 iso7810 iso7810dwwr active soic dww 16 1000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -55 to 125 iso7810 ISO7810FDW active soic dw 16 40 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -55 to 125 iso7810f ISO7810FDWr active soic dw 16 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -55 to 125 iso7810f ISO7810FDWw active soic dww 16 45 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -55 to 125 iso7810f ISO7810FDWwr active soic dww 16 1000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -55 to 125 iso7810f (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature.
package option addendum www.ti.com 2-sep-2016 addendum-page 2 (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device. (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis.
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant iso7810dwr soic dw 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 q1 iso7810dwwr soic dww 16 1000 330.0 24.4 18.0 10.0 3.0 20.0 24.0 q1 ISO7810FDWr soic dw 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 q1 ISO7810FDWwr soic dww 16 1000 330.0 24.4 18.0 10.0 3.0 20.0 24.0 q1 package materials information www.ti.com 2-aug-2016 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) iso7810dwr soic dw 16 2000 367.0 367.0 38.0 iso7810dwwr soic dww 16 1000 367.0 367.0 45.0 ISO7810FDWr soic dw 16 2000 367.0 367.0 38.0 ISO7810FDWwr soic dww 16 1000 367.0 367.0 45.0 package materials information www.ti.com 2-aug-2016 pack materials-page 2

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